2018 Applied Materials Technical Symposium in SEA
 
INNOVATION LEADERSHIP FOR ADVANCED PACKAGING
Cost Effective Advanced Wafer Level Packaging Solutions for Multi Die System Integration

The continual drive for performance and product differentiation has created an advanced packaging inflection with the need for better and more efficient system integration. Advanced packaging for System Integration (SI), because of the versatility it offers as compared to System-on-Chip (SoC), is a viable solution. While heterogeneous integration with 2.5D-interposer or 3D has primarily been used for high end (large packages) applications, the introduction of Fan-Out wafer-level packaging (FOWLP) provides a more cost effective and versatile packaging scheme to realize packaged SI with recent demand being driven by high-end mobile and other high-performance applications that require multi-die packaging. To continue to drive adoption of packaged Si, the industry will need to address forthcoming technical challenges while developing new cost effective solutions to improve Cost of ownership (CoO), Electrical performance, Yield, and Reliability.